This invention relates generally to digital electronic equipment, and more particularly to methods and apparatus for reducing power consumption for personal computer systems.
There are variety of reasons why computer designers wish to reduce power consumption in personal computers. Portable computers, for example, typically depend on batteries for power. Obviously, the less power consumed by the portable computer circuitry and peripherals, the longer the batteries will last. In addition to portable computer applications, it is also often desirable to have desktop computers that consume less power. This is because reduced power consumption reduces energy costs and, in a cumulative sense, reduces the negative environmental impacts of excessive energy consumption. Furthermore, desktop computers designed to consume less power also generate less heat, which means that they can be made smaller and with reduced cooling requirements.
The prior art has taken several approaches to reducing power consumption in personal computers. For example, many portable computers will shut down peripherals or very large functional system blocks (FSBs.TM.) that haven't been used for a predetermined period of time. These type of systems typically use hardware or software timers. Another technique known in the prior art is "clock throttling", which reduces computer power consumption reducing the speed of the clock driving the digital circuitry. Since there is a direct relationship between clock rate and power consumption, any lowering of the clock rate will reduce power consumption.
The prior art methods for reducing power consumption and personal computer suffers a variety of drawbacks. For example, if peripherals are turned off to reduce power consumption, they are not immediately available when they are needed. This causes the time-costly procedure of powering up the required peripheral and waiting for it to become fully operational prior to continuing the desired operation that used that peripheral. With "clock throttling" techniques, the user will note a marked decrease in performance as the clock rate is throttled back. For example, a typical computer calculation may take twice as long if the clock rate is cut in half.
In the prior art, the methods for reducing power consumption were often implemented in software on the computer. By implementing the method in software, valuable computational time is lost to the power consumption reduction function. Other methods employed in the prior art, reduce power consumption through hardware devices which monitor energy usage or which use timers to shut off peripherals or FSBs. For example, the hardware functionality which reduces power consumption can be provided as a stand-alone integrated circuit, or it can be formed as part of a "chip set" used by the computer system. In either case, expensive, additional circuitry separate from the computer logic is required.